diff --git a/config/buildroot_nano.patch b/config/buildroot_nano.patch
index 31ac479a1da4ec060179c164ad2e27872e6b37a7..08eac251f90e546b9ce062d9fdcbc4b0724de92f 100644
--- a/config/buildroot_nano.patch
+++ b/config/buildroot_nano.patch
@@ -1,12 +1,12 @@
board/friendlyarm/nanopi-neo-plus2/boot.cmd | 6 +
board/friendlyarm/nanopi-neo-plus2/genimage.cfg | 40 ++
- board/friendlyarm/nanopi-neo-plus2/linux.patch | 73 +++
- .../nanopi-neo-plus2/nanopi_neo_plus2_defconfig | 707 +++++++++++++++++++++
+ board/friendlyarm/nanopi-neo-plus2/linux.patch | 385 ++++++++++++
+ board/friendlyarm/nanopi-neo-plus2/linux_defconfig | 693 +++++++++++++++++++++
board/friendlyarm/nanopi-neo-plus2/readme.txt | 37 ++
board/friendlyarm/nanopi-neo-plus2/uboot.patch | 24 +
board/friendlyarm/nanopi-neo-plus2/uboot_defconfig | 16 +
- configs/nanopi_neo_plus2_defconfig | 63 ++
- 8 files changed, 966 insertions(+)
+ configs/nanopi_neo_plus2_defconfig | 72 +++
+ 8 files changed, 1273 insertions(+)
diff --git a/board/friendlyarm/nanopi-neo-plus2/boot.cmd b/board/friendlyarm/nanopi-neo-plus2/boot.cmd
new file mode 100644
@@ -68,14 +68,54 @@ index 0000000000..9072d815b3
+}
diff --git a/board/friendlyarm/nanopi-neo-plus2/linux.patch b/board/friendlyarm/nanopi-neo-plus2/linux.patch
new file mode 100644
-index 0000000000..2940412ff9
+index 0000000000..e921c2927c
--- /dev/null
+++ b/board/friendlyarm/nanopi-neo-plus2/linux.patch
-@@ -0,0 +1,73 @@
-+ .../boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 3 ++-
-+ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 18 +++++++++++++++---
-+ 2 files changed, 17 insertions(+), 4 deletions(-)
+@@ -0,0 +1,385 @@
++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 20 ++
++ .../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 3 +-
++ arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 18 +-
++ drivers/thermal/Kconfig | 7 +
++ drivers/thermal/Makefile | 1 +
++ drivers/thermal/sun8i_ths.c | 239 +++++++++++++++++++++
++ 6 files changed, 284 insertions(+), 4 deletions(-)
+
++diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
++index c3bff1105e5d..4364546956ba 100644
++--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
++@@ -488,6 +488,18 @@
++ };
++ };
++
+++ ths: ths@1c25000 {
+++ #thermal-sensor-cells = <0>;
+++ compatible = "allwinner,sun8i-h3-ths";
+++ reg = <0x01c25000 0x400>,
+++ <0x01c14234 0x4>;
+++ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+++ resets = <&ccu RST_BUS_THS>;
+++ reset-names = "ahb";
+++ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+++ clock-names = "ahb", "ths";
+++ };
+++
++ timer@1c20c00 {
++ compatible = "allwinner,sun4i-a10-timer";
++ reg = <0x01c20c00 0xa0>;
++@@ -857,4 +869,12 @@
++ };
++ };
++ };
+++
+++ thermal-zones {
+++ cpu_thermal: cpu_thermal {
+++ polling-delay-passive = <330>;
+++ polling-delay = <1000>;
+++ thermal-sensors = <&ths 0>;
+++ };
+++ };
++ };
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
+index 506e25ba028a..798d6ad90017 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -145,12 +185,284 @@ index 0000000000..2940412ff9
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
-diff --git a/board/friendlyarm/nanopi-neo-plus2/nanopi_neo_plus2_defconfig b/board/friendlyarm/nanopi-neo-plus2/nanopi_neo_plus2_defconfig
++diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
++index 82979880f985..9f8d8bbc6ff3 100644
++--- a/drivers/thermal/Kconfig
+++++ b/drivers/thermal/Kconfig
++@@ -420,6 +420,13 @@ depends on ARCH_BCM || ARCH_BRCMSTB || ARCH_BCM2835 || COMPILE_TEST
++ source "drivers/thermal/broadcom/Kconfig"
++ endmenu
++
+++config SUN8I_THS
+++ tristate "Thermal sensor driver for Allwinner H3"
+++ depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI)
+++ depends on OF
+++ help
+++ Enable this to support thermal reporting on some newer Allwinner SoCs.
+++
++ menu "Texas Instruments thermal drivers"
++ depends on ARCH_HAS_BANDGAP || COMPILE_TEST
++ depends on HAS_IOMEM
++diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
++index 610344eb3e03..dc8a24fddba9 100644
++--- a/drivers/thermal/Makefile
+++++ b/drivers/thermal/Makefile
++@@ -61,3 +61,4 @@ obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o
++ obj-$(CONFIG_GENERIC_ADC_THERMAL) += thermal-generic-adc.o
++ obj-$(CONFIG_ZX2967_THERMAL) += zx2967_thermal.o
++ obj-$(CONFIG_UNIPHIER_THERMAL) += uniphier_thermal.o
+++obj-$(CONFIG_SUN8I_THS) += sun8i_ths.o
++diff --git a/drivers/thermal/sun8i_ths.c b/drivers/thermal/sun8i_ths.c
++new file mode 100644
++index 000000000000..cfe7d1073b8c
++--- /dev/null
+++++ b/drivers/thermal/sun8i_ths.c
++@@ -0,0 +1,239 @@
+++/*
+++ * Thermal sensor driver for Allwinner H3 SoC
+++ *
+++ * Copyright (C) 2016 Ondřej Jirman
+++ * Based on the work of Josef Gajdusek <atx@atx.name>
+++ *
+++ * This software is licensed under the terms of the GNU General Public
+++ * License version 2, as published by the Free Software Foundation, and
+++ * may be copied, distributed, and modified under those terms.
+++ *
+++ * This program is distributed in the hope that it will be useful,
+++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+++ * GNU General Public License for more details.
+++ *
+++ */
+++
+++#include <linux/clk.h>
+++#include <linux/interrupt.h>
+++#include <linux/io.h>
+++#include <linux/module.h>
+++#include <linux/of_device.h>
+++#include <linux/platform_device.h>
+++#include <linux/reset.h>
+++#include <linux/slab.h>
+++#include <linux/thermal.h>
+++#include <linux/printk.h>
+++
+++#define THS_H3_CTRL0 0x00
+++#define THS_H3_CTRL2 0x40
+++#define THS_H3_INT_CTRL 0x44
+++#define THS_H3_STAT 0x48
+++#define THS_H3_FILTER 0x70
+++#define THS_H3_CDATA 0x74
+++#define THS_H3_DATA 0x80
+++
+++#define THS_H3_CTRL0_SENSOR_ACQ0(x) (x)
+++#define THS_H3_CTRL2_SENSE_EN BIT(0)
+++#define THS_H3_CTRL2_SENSOR_ACQ1(x) ((x) << 16)
+++#define THS_H3_INT_CTRL_DATA_IRQ_EN BIT(8)
+++#define THS_H3_INT_CTRL_THERMAL_PER(x) ((x) << 12)
+++#define THS_H3_STAT_DATA_IRQ_STS BIT(8)
+++#define THS_H3_FILTER_TYPE(x) ((x) << 0)
+++#define THS_H3_FILTER_EN BIT(2)
+++
+++#define THS_H3_CLK_IN 40000000 /* Hz */
+++#define THS_H3_DATA_PERIOD 330 /* ms */
+++
+++#define THS_H3_FILTER_TYPE_VALUE 2 /* average over 2^(n+1) samples */
+++#define THS_H3_FILTER_DIV (1 << (THS_H3_FILTER_TYPE_VALUE + 1))
+++#define THS_H3_INT_CTRL_THERMAL_PER_VALUE \
+++ (THS_H3_DATA_PERIOD * (THS_H3_CLK_IN / 1000) / THS_H3_FILTER_DIV / 4096 - 1)
+++#define THS_H3_CTRL0_SENSOR_ACQ0_VALUE 0x3f /* 16us */
+++#define THS_H3_CTRL2_SENSOR_ACQ1_VALUE 0x3f
+++
+++struct sun8i_ths_data {
+++ struct reset_control *reset;
+++ struct clk *clk;
+++ struct clk *busclk;
+++ void __iomem *regs;
+++ struct thermal_zone_device *tzd;
+++ u32 temp;
+++};
+++
+++static int sun8i_ths_get_temp(void *_data, int *out)
+++{
+++ struct sun8i_ths_data *data = _data;
+++
+++ if (data->temp == 0)
+++ return -EBUSY;
+++
+++ /* Formula and parameters from the Allwinner 3.4 kernel */
+++ *out = 217000 - (int)((data->temp * 1000000) / 8253);
+++ return 0;
+++}
+++
+++static irqreturn_t sun8i_ths_irq_thread(int irq, void *_data)
+++{
+++ struct sun8i_ths_data *data = _data;
+++
+++ writel(THS_H3_STAT_DATA_IRQ_STS, data->regs + THS_H3_STAT);
+++
+++ data->temp = readl(data->regs + THS_H3_DATA);
+++ if (data->temp)
+++ thermal_zone_device_update(data->tzd, THERMAL_EVENT_TEMP_SAMPLE);
+++
+++ return IRQ_HANDLED;
+++}
+++
+++static void sun8i_ths_h3_init(struct sun8i_ths_data *data)
+++{
+++ writel(THS_H3_CTRL0_SENSOR_ACQ0(THS_H3_CTRL0_SENSOR_ACQ0_VALUE),
+++ data->regs + THS_H3_CTRL0);
+++ writel(THS_H3_FILTER_EN | THS_H3_FILTER_TYPE(THS_H3_FILTER_TYPE_VALUE),
+++ data->regs + THS_H3_FILTER);
+++ writel(THS_H3_CTRL2_SENSOR_ACQ1(THS_H3_CTRL2_SENSOR_ACQ1_VALUE) |
+++ THS_H3_CTRL2_SENSE_EN,
+++ data->regs + THS_H3_CTRL2);
+++ writel(THS_H3_INT_CTRL_THERMAL_PER(THS_H3_INT_CTRL_THERMAL_PER_VALUE) |
+++ THS_H3_INT_CTRL_DATA_IRQ_EN,
+++ data->regs + THS_H3_INT_CTRL);
+++}
+++
+++static const struct thermal_zone_of_device_ops sun8i_ths_thermal_ops = {
+++ .get_temp = sun8i_ths_get_temp,
+++};
+++
+++static int sun8i_ths_probe(struct platform_device *pdev)
+++{
+++ struct sun8i_ths_data *data;
+++ struct resource *res;
+++ int ret;
+++ int irq;
+++
+++ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+++ if (!data)
+++ return -ENOMEM;
+++
+++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+++ if (!res) {
+++ dev_err(&pdev->dev, "no memory resources defined\n");
+++ return -EINVAL;
+++ }
+++
+++ data->regs = devm_ioremap_resource(&pdev->dev, res);
+++ if (IS_ERR(data->regs)) {
+++ ret = PTR_ERR(data->regs);
+++ dev_err(&pdev->dev, "failed to ioremap THS registers: %d\n", ret);
+++ return ret;
+++ }
+++
+++ irq = platform_get_irq(pdev, 0);
+++ if (irq < 0) {
+++ dev_err(&pdev->dev, "failed to get IRQ: %d\n", irq);
+++ return irq;
+++ }
+++
+++ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
+++ sun8i_ths_irq_thread, IRQF_ONESHOT,
+++ dev_name(&pdev->dev), data);
+++ if (ret)
+++ return ret;
+++
+++ data->busclk = devm_clk_get(&pdev->dev, "ahb");
+++ if (IS_ERR(data->busclk)) {
+++ ret = PTR_ERR(data->busclk);
+++ dev_err(&pdev->dev, "failed to get ahb clk: %d\n", ret);
+++ return ret;
+++ }
+++
+++ data->clk = devm_clk_get(&pdev->dev, "ths");
+++ if (IS_ERR(data->clk)) {
+++ ret = PTR_ERR(data->clk);
+++ dev_err(&pdev->dev, "failed to get ths clk: %d\n", ret);
+++ return ret;
+++ }
+++
+++ data->reset = devm_reset_control_get(&pdev->dev, "ahb");
+++ if (IS_ERR(data->reset)) {
+++ ret = PTR_ERR(data->reset);
+++ dev_err(&pdev->dev, "failed to get reset: %d\n", ret);
+++ return ret;
+++ }
+++
+++ ret = reset_control_deassert(data->reset);
+++ if (ret) {
+++ dev_err(&pdev->dev, "reset deassert failed: %d\n", ret);
+++ return ret;
+++ }
+++
+++ ret = clk_prepare_enable(data->busclk);
+++ if (ret) {
+++ dev_err(&pdev->dev, "failed to enable bus clk: %d\n", ret);
+++ goto err_assert_reset;
+++ }
+++
+++ ret = clk_prepare_enable(data->clk);
+++ if (ret) {
+++ dev_err(&pdev->dev, "failed to enable ths clk: %d\n", ret);
+++ goto err_disable_bus;
+++ }
+++
+++ ret = clk_set_rate(data->clk, THS_H3_CLK_IN);
+++ if (ret)
+++ goto err_disable_ths;
+++
+++ data->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, data,
+++ &sun8i_ths_thermal_ops);
+++ if (IS_ERR(data->tzd)) {
+++ ret = PTR_ERR(data->tzd);
+++ dev_err(&pdev->dev, "failed to register thermal zone: %d\n",
+++ ret);
+++ goto err_disable_ths;
+++ }
+++
+++ sun8i_ths_h3_init(data);
+++
+++ platform_set_drvdata(pdev, data);
+++ return 0;
+++
+++err_disable_ths:
+++ clk_disable_unprepare(data->clk);
+++err_disable_bus:
+++ clk_disable_unprepare(data->busclk);
+++err_assert_reset:
+++ reset_control_assert(data->reset);
+++ return ret;
+++}
+++
+++static int sun8i_ths_remove(struct platform_device *pdev)
+++{
+++ struct sun8i_ths_data *data = platform_get_drvdata(pdev);
+++
+++ reset_control_assert(data->reset);
+++ clk_disable_unprepare(data->clk);
+++ clk_disable_unprepare(data->busclk);
+++ return 0;
+++}
+++
+++static const struct of_device_id sun8i_ths_id_table[] = {
+++ { .compatible = "allwinner,sun8i-h3-ths", },
+++ { /* sentinel */ },
+++};
+++MODULE_DEVICE_TABLE(of, sun8i_ths_id_table);
+++
+++static struct platform_driver sun8i_ths_driver = {
+++ .probe = sun8i_ths_probe,
+++ .remove = sun8i_ths_remove,
+++ .driver = {
+++ .name = "sun8i_ths",
+++ .of_match_table = sun8i_ths_id_table,
+++ },
+++};
+++
+++module_platform_driver(sun8i_ths_driver);
+++
+++MODULE_AUTHOR("Ondřej Jirman <megous@megous.com>");
+++MODULE_DESCRIPTION("Thermal sensor driver for Allwinner H3 SoC");
+++MODULE_LICENSE("GPL v2");
+diff --git a/board/friendlyarm/nanopi-neo-plus2/linux_defconfig b/board/friendlyarm/nanopi-neo-plus2/linux_defconfig
new file mode 100644
-index 0000000000..757355e000
+index 0000000000..b69419a154
--- /dev/null
-+++ b/board/friendlyarm/nanopi-neo-plus2/nanopi_neo_plus2_defconfig
-@@ -0,0 +1,707 @@
++++ b/board/friendlyarm/nanopi-neo-plus2/linux_defconfig
+@@ -0,0 +1,693 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_AUDIT=y
@@ -219,15 +531,9 @@ index 0000000000..757355e000
+CONFIG_ARCH_ZX=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_PCI=y
-+CONFIG_HOTPLUG_PCI_PCIE=y
+CONFIG_PCI_IOV=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_HOTPLUG_PCI_ACPI=y
-+CONFIG_PCI_LAYERSCAPE=y
-+CONFIG_PCI_HISI=y
-+CONFIG_PCIE_QCOM=y
-+CONFIG_PCIE_ARMADA_8K=y
-+CONFIG_PCIE_KIRIN=y
+CONFIG_PCI_AARDVARK=y
+CONFIG_PCI_TEGRA=y
+CONFIG_PCIE_RCAR=y
@@ -235,7 +541,11 @@ index 0000000000..757355e000
+CONFIG_PCI_XGENE=y
+CONFIG_PCI_HOST_THUNDER_PEM=y
+CONFIG_PCI_HOST_THUNDER_ECAM=y
-+CONFIG_PCIE_ROCKCHIP=m
++CONFIG_PCI_LAYERSCAPE=y
++CONFIG_PCI_HISI=y
++CONFIG_PCIE_QCOM=y
++CONFIG_PCIE_ARMADA_8K=y
++CONFIG_PCIE_KIRIN=y
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_SCHED_MC=y
+CONFIG_NUMA=y
@@ -338,9 +648,7 @@ index 0000000000..757355e000
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_NBD=m
+CONFIG_VIRTIO_BLK=y
-+CONFIG_BLK_DEV_NVME=m
+CONFIG_SRAM=y
-+CONFIG_EEPROM_AT25=m
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_SAS_ATA=y
@@ -382,9 +690,9 @@ index 0000000000..757355e000
+# CONFIG_NET_VENDOR_AQUANTIA is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ATHEROS is not set
-+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
++# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CISCO is not set
@@ -393,12 +701,12 @@ index 0000000000..757355e000
+# CONFIG_NET_VENDOR_DLINK is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
-+# CONFIG_NET_VENDOR_EXAR is not set
+# CONFIG_NET_VENDOR_FREESCALE is not set
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_HP is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
+# CONFIG_NET_VENDOR_INTEL is not set
++# CONFIG_NET_VENDOR_EXAR is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MELLANOX is not set
+# CONFIG_NET_VENDOR_MICREL is not set
@@ -412,15 +720,15 @@ index 0000000000..757355e000
+# CONFIG_NET_PACKET_ENGINE is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
++# CONFIG_NET_VENDOR_RDC is not set
+# CONFIG_NET_VENDOR_REALTEK is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
-+# CONFIG_NET_VENDOR_RDC is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
++# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SILAN is not set
+# CONFIG_NET_VENDOR_SIS is not set
-+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
+CONFIG_STMMAC_ETH=y
@@ -428,11 +736,11 @@ index 0000000000..757355e000
+# CONFIG_DWMAC_MESON is not set
+# CONFIG_DWMAC_ROCKCHIP is not set
+# CONFIG_NET_VENDOR_SUN is not set
++# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_TEHUTI is not set
+# CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
-+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+CONFIG_MDIO_BITBANG=y
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_LED_TRIGGER_PHY=y
@@ -526,7 +834,6 @@ index 0000000000..757355e000
+CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+CONFIG_PINCTRL_MT7622=y
+CONFIG_GPIO_SYSFS=y
-+# CONFIG_GPIO_RASPBERRYPI_EXP is not set
+# CONFIG_GPIO_BRCMSTB is not set
+CONFIG_GPIO_DWAPB=y
+# CONFIG_GPIO_TEGRA is not set
@@ -548,6 +855,7 @@ index 0000000000..757355e000
+CONFIG_ROCKCHIP_THERMAL=m
+CONFIG_RCAR_GEN3_THERMAL=y
+CONFIG_BRCMSTB_THERMAL=m
++CONFIG_SUN8I_THS=y
+CONFIG_EXYNOS_THERMAL=y
+CONFIG_TEGRA_BPMP_THERMAL=m
+CONFIG_QCOM_TSENS=y
@@ -658,7 +966,6 @@ index 0000000000..757355e000
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
-+CONFIG_USB_CHIPIDEA_ULPI=y
+CONFIG_USB_ISP1760=y
+CONFIG_USB_HSIC_USB3503=y
+CONFIG_NOP_USB_XCEIV=y
@@ -666,7 +973,6 @@ index 0000000000..757355e000
+CONFIG_USB_GADGET=y
+CONFIG_USB_RENESAS_USBHS_UDC=m
+CONFIG_USB_RENESAS_USB3=m
-+CONFIG_USB_ULPI_BUS=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_ARMMMCI=y
@@ -748,7 +1054,6 @@ index 0000000000..757355e000
+CONFIG_ARM_MHU=y
+CONFIG_PLATFORM_MHU=y
+CONFIG_BCM2835_MBOX=y
-+CONFIG_HI6220_MBOX=y
+CONFIG_QCOM_APCS_IPC=y
+CONFIG_ROCKCHIP_IOMMU=y
+CONFIG_TEGRA_IOMMU_SMMU=y
@@ -756,7 +1061,6 @@ index 0000000000..757355e000
+CONFIG_ARM_SMMU_V3=y
+CONFIG_QCOM_IOMMU=y
+CONFIG_RPMSG_QCOM_SMD=y
-+CONFIG_RASPBERRYPI_POWER=y
+CONFIG_QCOM_SMEM=y
+CONFIG_QCOM_SMD_RPM=y
+CONFIG_QCOM_SMP2P=y
@@ -798,31 +1102,25 @@ index 0000000000..757355e000
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_ARM_SCPI_PROTOCOL=y
-+CONFIG_RASPBERRYPI_FIRMWARE=y
++# CONFIG_DMIID is not set
+CONFIG_EFI_CAPSULE_LOADER=y
+CONFIG_ACPI=y
+CONFIG_ACPI_APEI=y
+CONFIG_ACPI_APEI_GHES=y
-+CONFIG_ACPI_APEI_PCIEAER=y
+CONFIG_ACPI_APEI_MEMORY_FAILURE=y
+CONFIG_ACPI_APEI_EINJ=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
-+CONFIG_BTRFS_FS=m
-+CONFIG_BTRFS_FS_POSIX_ACL=y
+CONFIG_FANOTIFY=y
+CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
+CONFIG_QUOTA=y
++# CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_AUTOFS4_FS=y
-+CONFIG_FUSE_FS=m
-+CONFIG_CUSE=m
-+CONFIG_OVERLAY_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_HUGETLBFS=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_EFIVAR_FS=y
-+CONFIG_SQUASHFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
@@ -955,13 +1253,15 @@ index 0000000000..f1c64ba55e
+CONFIG_USB_EHCI_HCD=y
diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig
new file mode 100644
-index 0000000000..849a568b4d
+index 0000000000..d44e8690a8
--- /dev/null
+++ b/configs/nanopi_neo_plus2_defconfig
-@@ -0,0 +1,63 @@
+@@ -0,0 +1,72 @@
+BR2_aarch64=y
+BR2_ARM_FPU_VFPV4=y
+BR2_TOOLCHAIN_EXTERNAL=y
++BR2_PACKAGE_HOST_GDB=y
++BR2_GDB_VERSION_8_0=y
+BR2_TARGET_GENERIC_ISSUE="Welcome to FriendlyARM Nanopi NEO Plus2"
+BR2_ROOTFS_POST_IMAGE_SCRIPT="support/scripts/genimage.sh"
+BR2_ROOTFS_POST_SCRIPT_ARGS="-c board/friendlyarm/nanopi-neo-plus2/genimage.cfg"
@@ -970,7 +1270,7 @@ index 0000000000..849a568b4d
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="4.18.5"
+BR2_LINUX_KERNEL_PATCH="board/friendlyarm/nanopi-neo-plus2/linux.patch"
+BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
-+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/friendlyarm/nanopi-neo-plus2/nanopi_neo_plus2_defconfig"
++BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="board/friendlyarm/nanopi-neo-plus2/linux_defconfig"
+BR2_LINUX_KERNEL_DTS_SUPPORT=y
+BR2_LINUX_KERNEL_INTREE_DTS_NAME="allwinner/sun50i-h5-nanopi-neo-plus2"
+BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y
@@ -983,15 +1283,22 @@ index 0000000000..849a568b4d
+BR2_PACKAGE_GDB=y
+BR2_PACKAGE_GDB_SERVER=y
+BR2_PACKAGE_GDB_DEBUGGER=y
++BR2_PACKAGE_LSOF=y
+BR2_PACKAGE_OPROFILE=y
+BR2_PACKAGE_STRACE=y
++BR2_PACKAGE_VALGRIND=y
++BR2_PACKAGE_I2C_TOOLS=y
++BR2_PACKAGE_UBOOT_TOOLS=y
++BR2_PACKAGE_MICROPYTHON=y
++BR2_PACKAGE_MICROPYTHON_LIB=y
+BR2_PACKAGE_OPENSSH=y
+BR2_PACKAGE_HTOP=y
+BR2_PACKAGE_PROCPS_NG=y
++BR2_PACKAGE_VIM=y
+BR2_TARGET_ROOTFS_EXT2=y
+BR2_TARGET_ROOTFS_EXT2_4=y
+BR2_TARGET_ROOTFS_EXT2_LABEL="rootfs"
-+BR2_TARGET_ROOTFS_EXT2_SIZE="100M"
++BR2_TARGET_ROOTFS_EXT2_SIZE="120M"
+BR2_TARGET_ARM_TRUSTED_FIRMWARE=y
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_GIT=y
+BR2_TARGET_ARM_TRUSTED_FIRMWARE_CUSTOM_REPO_URL="https://github.com/apritzel/arm-trusted-firmware.git"