nano buildroot updated

bb047ff5 · Daniel Gachet · ec8b9d26 · bb047ff5
Commit bb047ff5 authored 5 years ago by Daniel Gachet
--- a/config/buildroot_bbb.patch
+++ b/config/buildroot_bbb.patch
+ board/bbb-heiafr/bbb-heiafr.dts                    | 126 ++++++
 board/bbb-heiafr/boot.cmd                          |   6 +
 board/bbb-heiafr/genimage.cfg                      |  29 ++
 board/bbb-heiafr/linux_defconfig                   | 503 +++++++++++++++++++++
@@ -6,23 +7,155 @@
 .../patches/linux/0003-bbb-heiafr-seg7-gpio.patch  |  37 ++
 .../patches/uboot/0001-board-seg7-gpio.patch       |  28 ++
 configs/bbb-heiafr_defconfig                       |  81 ++++
- 8 files changed, 716 insertions(+)
+ 9 files changed, 842 insertions(+)
+diff --git a/board/bbb-heiafr/bbb-heiafr.dts b/board/bbb-heiafr/bbb-heiafr.dts
+new file mode 100644
+index 0000000000..6449de9c72
+--- /dev/null
+++ b/board/bbb-heiafr/bbb-heiafr.dts
+@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2019 HIEA-FR - http://www.heia-fr.ch/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am335x-boneblack.dts"
+
+/ {
+	seg7 {
+		pinctrl-names = "default";
+		pinctrl-0 = <&seg7_pins>;
+		compatible = "gpio-leds";
+
+		sega {
+			label = "seg7:sega";
+			gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "sega";
+			default-state = "off";
+		};
+
+		segb {
+			label = "seg7:segb";
+			gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "segb";
+			default-state = "off";
+		};
+
+		segc {
+			label = "seg7:segc";
+			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "segc";
+			default-state = "off";
+		};
+
+		segd {
+			label = "seg7:segd";
+			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "segd";
+			default-state = "off";
+		};
+
+		sege {
+			label = "seg7:sege";
+			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "sege";
+			default-state = "off";
+		};
+
+		segf {
+			label = "seg7:segf";
+			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "segf";
+			default-state = "off";
+		};
+
+		segg {
+			label = "seg7:segg";
+			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "segg";
+			default-state = "off";
+		};
+
+		dp1 {
+			label = "seg7:dp1";
+			gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "dp1";
+			default-state = "off";
+		};
+
+		dp2 {
+			label = "seg7:dp2";
+			gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "dp2";
+			default-state = "off";
+		};
+	};
+};
+
+&am33xx_pinmux {
+	spi1_pins: pinmux_spi1_pins {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x990, PIN_INPUT | MUX_MODE3)			/* mcasp0_aclkx.spi1_sclk */
+			AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* mcasp0_fsx.spi0_d0 */
+			AM33XX_IOPAD(0x998, PIN_INPUT | MUX_MODE3)			/* mcasp0_axr0.spi0_d1 */
+			AM33XX_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)			/* mcasp0_ahclkr.spi0_cs0 */
+			AM33XX_IOPAD(0x97c, PIN_OUTPUT | MUX_MODE4)			/* uart1_rtsn.spi0_cs1 */
+		>;
+	};
+
+	seg7_pins: seg7_pins {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x958, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio0.4 */
+			AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio0.5 */
+			AM33XX_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio0.14 */
+			AM33XX_IOPAD(0x820, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio0.22 */
+			AM33XX_IOPAD(0x824, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio0.23 */
+			AM33XX_IOPAD(0x828, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio0.26 */
+			AM33XX_IOPAD(0x82c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio0.27 */
+			AM33XX_IOPAD(0x898, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio2.4 */
+			AM33XX_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)			/* gpio2.5 */
+		>;
+	};
+};
+
+
+&i2c2_pins {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_ctsn.i2c2_sda */
+			AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0.i2c2_scl */
+		>;
+};
+
+&spi1 {
+		status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi1_pins>;
+		spidev@1 {
+				spi-max-frequency = <24000000>;
+				reg = <0>;
+				compatible = "rohm,dh2228fv";
+		};
+};
 diff --git a/board/bbb-heiafr/boot.cmd b/board/bbb-heiafr/boot.cmd
 new file mode 100644
-index 0000000000..4f367003fe
+index 0000000000..574b6be24b
 --- /dev/null
 +++ b/board/bbb-heiafr/boot.cmd
 @@ -0,0 +1,6 @@
-+setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
+setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootfstype=ext4 rootwait
 +
-+fatload mmc 0 $kernel_addr_r zImage
+fatload mmc 1 $kernel_addr_r zImage
-+fatload mmc 0 $fdt_addr_r am335x-boneblack.dtb
+fatload mmc 1 $fdt_addr_r bbb-heiafr.dtb
 +
 +bootz $kernel_addr_r - $fdt_addr_r
 diff --git a/board/bbb-heiafr/genimage.cfg b/board/bbb-heiafr/genimage.cfg
 new file mode 100644
-index 0000000000..664e242d92
+index 0000000000..1d215e84bf
 --- /dev/null
 +++ b/board/bbb-heiafr/genimage.cfg
 @@ -0,0 +1,29 @@
@@ -32,7 +165,7 @@ index 0000000000..664e242d92
 +			"MLO",
 +			"u-boot.img",
 +			"zImage",
-+			"am335x-boneblack.dtb",
+			"bbb-heiafr.dtb",
 +			"boot.scr",
 +		}
 +	}